When a sequential circuit uses D flip-flops, each next-state bit becomes the corresponding D input. With JK flip-flops, the inputs do not directly equal the next state. Their required values depend on the transition from present Q to next Q⁺, so the excitation table must be applied before constructing K-maps.
This guide derives the JK input equations for a two-bit synchronous binary counter. It shows how to translate each state transition into J and K requirements, why some excitation entries are don't-cares, how to minimize each input function, and how to verify the resulting sequence. It also contrasts JK excitation don't-cares with unspecified FSM state codes, a distinction that matters when optimizing sequential logic.
Define the counter behavior
Use two state bits A and B to count upward through 00→01→10→11→00. The machine has no external input and uses JK flip-flops for both bits. The present-state/next-state table is:
| Present AB | Next A⁺B⁺ | A transition | B transition |
|---|---|---|---|
| 00 | 01 | 0→0 | 0→1 |
| 01 | 10 | 0→1 | 1→0 |
| 10 | 11 | 1→1 | 0→1 |
| 11 | 00 | 1→0 | 1→0 |
For each state bit, use its own J and K inputs. The pair JA,KA controls A; JB,KB controls B. It is not correct to feed the D-flip-flop equations A⁺ and B⁺ directly into the J and K pins. The JK characteristic behavior is: 00 holds 0, 01 resets to 0, 10 sets to 1, and 11 toggles the current output.
Use the JK excitation table
The excitation table asks what J,K values can cause each desired transition:
| Q | Q⁺ | J | K | Meaning |
|---|---|---|---|---|
| 0 | 0 | 0 | X | Keep the output low |
| 0 | 1 | 1 | X | Set the output |
| 1 | 0 | X | 1 | Reset the output |
| 1 | 1 | X | 0 | Keep the output high |
The X entries are excitation don't-cares. If Q=0, the value of K cannot affect the next output because the JK equation is Q⁺=JQ′+K′Q; with Q=0, the K-dependent term is multiplied by Q. Similarly, if Q=1, J is irrelevant. The map can choose whichever value simplifies the input function without changing the requested transition.
Apply the table independently to A and B for each present-state row. For A, the transitions are 0→0 at 00, 0→1 at 01, 1→1 at 10, and 1→0 at 11. Thus JA values are 0,1,X,X; KA values are X,X,0,1. For B, the transitions are 0→1 at 00, 1→0 at 01, 0→1 at 10, and 1→0 at 11. So JB is 1, X, 1, X and KB is X,1,X,1.
Build maps for each input
Each JK input is a Boolean function of the present state bits A and B. Make four two-variable maps: JA, KA, JB, and KB. Enter the required 0 or 1 from the excitation table, and mark irrelevant inputs as X. Do not map A⁺ or B⁺ directly in these charts; the charts describe the control pins.
For JA, the 1 at state 01 can group with the X cells at 10 and 11 if a broader implicant is possible? On a two-variable map, the 01 cell is adjacent to 00 and 11; 00 is specified 0 and 11 is X, so group {01,11} gives B. The X at 10 is not needed. Therefore JA=B. For KA, the required 1 is at 11, the 0 at 10, and states 00,01 are X. Group 11 with 01 (differing in A) to give B. Thus KA=B.
For JB, the 1s are at 00 and 10, while 01 and 11 are X. Group the entire B=0 column (both A values) to get JB=B′. Wait the map variables are present A and B, and JB must be 1 whenever B=0; that is B′. For KB, required 1s are at 01 and 11, with the other states X; group the B=1 row to get KB=B. The excitation values were entered in state order 00,01,10,11, so Gray adjacency should be respected while drawing the two-variable map.
Simplify the equations
The minimized input equations are:
KA = B
JB = B′
KB = B
For the B flip-flop, both 0→1 transitions occur when B=0, so JB=B′. Both 1→0 transitions occur when B=1, so KB=B. For the A flip-flop, the set and reset transitions occur when B=1, which gives JA=KA=B. These equations follow directly from the excitation entries and remain valid for every present state in the four-state cycle.
Using Q⁺=JQ′+K′Q, verify the A bit. If B=0, JA=KA=0, so A holds. If B=1, J=K=1, so A toggles. That is the behavior of the most significant bit in a binary counter: it toggles whenever the low bit is high. For B, when B=0, J=1,K=0 so it sets to 1; when B=1,J=0,K=1 so it resets to 0. Therefore B toggles on every clock edge.
Verify the counter cycle
At state 00, B=0. The A flop holds 0; the B flop has J=1,K=0 and sets, producing 01. At 01, B=1, so A toggles from 0 to 1; the B flop resets from 1 to 0, producing 10. At 10, B=0, so A holds 1 and B sets to 1, producing 11. At 11, B=1, so A toggles to 0 and B resets to 0, returning to 00.
This state-by-state verification is important because an excitation table can be transcribed incorrectly even if each K-map is minimized correctly. Confirm all four transitions against the original sequence. If the design includes reset or an enable, add those conditions to the state table and derive new excitation values. A hold enable, for example, means every state bit should remain unchanged when E=0; it does not mean all J and K inputs are zero in every state without checking Q.
For a larger FSM, an exhaustive state table may have many rows and external inputs. The same principle applies: derive the required JK excitation values for every legal transition, then minimize each J and K function with the relevant present-state and input variables. After equations are found, use the characteristic equation or truth table to reconstruct Q⁺ and verify the original transitions.
Understand excitation X values
Excitation don't-cares arise because one control input is irrelevant for a particular present output value. For example, when Q=0, K is irrelevant to the next-state equation. This is a property of the JK device behavior. It is safe to mark that entry X for the corresponding row if the flip-flop model is correct.
That is different from marking an unused state code X. An unused state is a present-state pattern for which the FSM's required next behavior may be unspecified. Whether that row is free depends on the system requirement and recovery policy. A JK excitation X does not grant freedom to change the abstract next state; it only allows either value for the control pin that does not affect the desired transition from that particular Q.
Keep the two sources visually distinct in design notes. One column can identify excitation don't-cares from the device table; another can identify unreachable-state don't-cares justified by a reachability assumption. This makes later reviews much safer, particularly if the state encoding changes or recovery behavior is added.
Common derivation mistakes
- Using D equations as J and K: JK inputs control set, reset, hold, and toggle behavior.
- Forgetting current Q: the same J,K pair has different next-state effect depending on Q.
- Swapping set and reset: 0→1 requires J=1; 1→0 requires K=1.
- Treating X as 0: an excitation X is available for grouping and can simplify the map.
- Grouping by ordinary binary order: map cells use Gray adjacency.
- Stopping after simplification: substitute every state and reconstruct Q⁺ to verify.
Another common issue is switching variable names between the state table and the map. Label the map axes A and B, keep the state code order fixed, and label each chart with its target input, such as KA. A correct equation attached to the wrong flip-flop is still an incorrect circuit.
A reusable procedure
- Write the desired state transitions. Include reset, enable, and any external inputs.
- For each state bit, record Q and Q⁺. Do this independently for every flip-flop.
- Apply the excitation table. Fill J and K values and mark device-level X entries.
- Build one K-map per control input. Include the relevant present-state and input variables.
- Minimize using valid X cells. Preserve all specified 0s and 1s.
- Reconstruct the next state. Use the JK characteristic equation or direct device behavior.
- Verify every row. Confirm the implemented sequence, including recovery behavior.
The two-bit counter provides a compact result: A toggles when B=1, while B toggles every cycle. The JK equations express that as JA=KA=B, JB=B′, and KB=B. The K-maps make the inputs simple, but the excitation table is what correctly connects those equations to the desired sequential behavior.
Why the low bit toggles every cycle
The equations have a simple counter interpretation. Since B toggles at each active edge, setting JB=1 and KB=1 would be sufficient for a JK device in every state. The minimized pair JB=B′ and KB=B looks different because it uses the irrelevant excitation inputs to reduce each control function: when B=0, only J must be asserted; when B=1, only K must be asserted. Both implementations produce the same next-state sequence.
This is a useful reminder that a minimized excitation network need not use the visually symmetric toggle setting. The X entries are what allow the maps to choose the state-dependent set and reset controls. If a particular library or coding standard favors explicit toggle mode, that implementation choice can be retained even if it is not the smallest Boolean equation.